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Microsoft?s new Windows CE operating system creates new opportunities,
and new challenges, for processor manufacturers. The seven handheld
personal computers (HPCs) announced at Comdex were based on three
different CPUs, none of which had ever been used for a Microsoft
operating system before. Why did all of these vendors choose RISC
chips, forsaking the Intel x86 CISC architecture supported by
all previous Windows operating systems? The answer has as much
to do with economics as technology.
For years, Intel has been almost exclusively focused on developing
x86 processors for personal computers. The company?s closest approach
to the HPC market is the 486GXSF, a 486-class chip with no integrated
peripherals and a typical power consumption of over 0.5W at 33
MHz, yielding a performance of only about 12 million instructions
per second (MIPS). This is quite low compared with RISC-based
processors.
Other companies offer x86-compatible parts for handheld computers,
such as AMD?s Elan and National?s NS486, but none can match the
price/performance ratios of the three processors chosen for the
first HPCs.
Hitachi SH7708
The most popular choice is Hitachi?s SH7708, used in the Casio
Cassiopeia, Compaq PC Companion, HP Palmtop PC, LG GP40M, and
Hitachi?s own Handheld PC. The SH7708 is a 32-bit RISC chip first
announced in early 1995, an upgrade of the SH7604 found in the
Sega Saturn video game. The SH7708 offers good performance, scaling
up to 100 MHz?although the initial HPCs all run at 40 MHz. The
SH7708 has a unified 8K primary cache, shared between instructions
and data. The cache is four-way set associative, reducing the
likelihood of ?cache thrashing? in a multitasking environment
like WindowsCE.
The SH7708?s instruction set is unusual among 32-bit RISC processors.
Instead of 32-bit instructions like other RISCs or the variable-length
instructions of CISC processors like the x86 family, Hitachi?s
SH-3 architecture uses fixed-length 16-bit instructions. The smaller
instructions produce smaller compiled programs, but compromise
many of the advantages of RISC. For example, SH-3 processors have
only 16 registers and don?t support three-operand arithmetic operations,
forcing more memory transactions as data is moved in and out of
the smaller register set.
To accelerate certain signal-processing functions like audio
decompression, the SH7708 has a hardware multiply-accumulate (MAC)
unit. This block of logic can multiply two 16-bit operands stored
in memory, forming a 32-bit product, then add the product to a
special 42-bit accumulator, all with a single instruction. Because
the MAC function references memory, it is relatively slow. The
normal multiply instructions use the same 16x16-bit multiplier
unit; the chip does not support 32x32-bit multiplies except through
software emulation. While the earlier SH7604 had a hardware divide
unit, the SH7708 does not, so 32x32-bit divide operations take
37 cycles.
Still, the SH7708 offers a peak efficiency of one MIPS per MHz,
and comes at a good price?probably under $20 in large quantities.
Hitachi sells millions of SH-3 parts every year, helping to keep
manufacturing costs low. Power consumption is also low, around
250 mW when running at full speed. All HPCs are equipped with
effective power-management hardware and software, so the average
power drain from any of these CPUs will be much lower than the
typical figures provided by the chip vendors.
All current SH7708-based HPCs share the same basic architecture.
The SH7708 connects directly to ROM, RAM, and an application-specific
IC (ASIC) that includes the LCD controller, PC Card interface,
and other essential peripherals. Since the SH7708 only has 26
address lines, these HPCs are limited to a total of 64Mb of direct-addressed
memory, but this is more than adequate for handheld devices.
The remaining two HPCs come from NEC and Philips, and both of
these vendors provide their own processors. Both are members of
the MIPS family of RISC microprocessors used in a wide range of
systems from the Nintendo-64 video game to SGI supercomputers.
NECVR4101
NEC?s MobilePro HPC is driven by the VR4101, a 33-MHz, 33-MIPS
device with a 32-bit processor core and relatively small primary
caches: just 2K for instructions and 1K for data. These caches
are direct-mapped, reducing efficiency compared to the set-associative
caches of the SH7708. The VR4101 also has several integrated peripherals,
including a ROM/DRAM controller, five-channel DMA controller,
real-time clock, and interfaces to external audio, IrDA (infrared),
keyboard, touch-screen, and serial devices.
The VR4101?s small, non-associative caches will have an adverse
effect on the part?s performance, but NEC may have chosen to give
up large caches in exchange for the on-chip peripherals. The VR4101
also has a MAC function, but unlike the SH7708, the VR4101 performs
a 16x16-bit multiply plus addition into a 64-bit accumulator in
only one cycle. This gives the VR4101 enough signal-processing
power to handle demanding applications like software modem implementations.
The MobilePro doesn?t take advantage of this capability, but it
is likely that future products will.
Despite its small size, only 6.5 x 6.5 mm, the VR4101 is a true
64-bit processor. It has 64-bit registers and supports 64-bit
addressing, just like high-end MIPS processors. This goes beyond
Microsoft?s basic requirements. MIPS processors for Windows CE
need only be compatible with the 32-bit mode of the R4000 architecture.
The VR4101 provides all this performance at a typical power consumption
of only 250 mW at 33 MHz. Since NEC?s Computer Systems Division
buys the VR4101 from NEC Electronics, it?s difficult to say what
they?re paying for it, but the retail price of the VR4101 is under
$25. NEC?s internal price is probably much lower.
Figure 1 shows the system block diagram of the MobilePro, illustrating
the relationship between the VR4101 and the ASIC that includes
the LCD controller and other peripherals not built into the CPU
itself.
Philips TwoChipPIC
Philips also uses its own MIPS processor in its Velo 1, but took
a different approach, favoring even higher integration than the
VR4101. Philips designed almost all of the necessary logic for
an HPC into a two-chip set it calls the TwoChipPIC (for Personal
Intelligent Communicator). The chip set consists of the PR31500
microcontroller and the UCB1100 analog interface chip.
The PR31500 includes a 32-bit MIPS core, 4K of instruction cache,
1K of data cache, and many peripherals. In addition to all the
basic features of the VR4101, the PR31500 has an LCD interface
that supports color and gray-scale displays up to 1024x1024 pixels
in size. It also sports a PCMCIA interface, a Concentration Highway
Interface (CHI) port (a very high-speed interface for ISDN or
wireless communications at up to 4 Mbit/s), an internal keyboard
controller, and 39 bidirectional I/O pins.
As seen in Figure 2, the Velo HPC contains little more than the
TwoChipPIC chip set, memory, and some interface logic. This simple
organization is a consequence of the sophistication of Philips?
processor design.
Philips licensed a version of Toshiba?s R3900 MIPS RISC processor
core for the PR31500. The company describes the core as an R3000-class
processor, but it is compatible with the R4000 instruction set.
The core runs at 37 MHz, achieving roughly 37 MIPS, the best performance
of all HPC processors. The caches are larger than the VR4101?s
but still smaller than the SH7708?s. The registers are only 32
bits wide, unlike the VR4101; this reduces the size and complexity
of the core, and Windows CE does not use the 64-bit mode of the
VR4101 anyway.
The UCB1100 is connected to the PR31500 via a four-wire 15-MHz
serial bus. The UCB1100 provides a 12-bit audio codec and a 14-bit
modem codec, a touchscreen interface, and a 10-bit A/D converter
for measuring battery voltages and other analog inputs. The UCB1100
can be connected to a microphone and headphones with no external
components, and only a 600-ohm transformer is required for a telephone-line
interface. The Velo?s voice-memo feature was made possible by
the UCB1100?s audio codec.
A third ?component? of the TwoChipPIC is a complete V.32bis software
fax/modem implementation developed for Philips by General Magic.
The Velo is unique among the first HPCs in having a built-in modem,
made possible by the high integration of the TwoChipPIC and the
General Magic software. The modem code uses the PR31500?s MAC
instruction, which operates much like the VR4101?s MAC implementation.
Together, the two devices in the chip set consume less than 400
mW under normal conditions, excellent performance considering
the broad range of functions built into the devices. The price
is also very competitive, less than $39?probably less than the
combination of the SH7708 or VR4101 plus the ASIC(s) required
by those processors.
All of the early HPCs offer similar features and performance;
even the Velo is really only slightly faster. Exact comparisons
are impossible until we have reasonable benchmarks for Windows
CE. Future HPCs are likely to provide much more differentiation,
since Microsoft has announced that Windows CE will also be supported
on three other CPU architectures: x86, PowerPC, and ARM.
It?s likely that x86-based WindowsCE products will be limited
to embedded applications like office equipment. There is no advantage
to x86 compatibility under Windows CE, since there is no way to
run existing Windows 95 or Windows NT software in the much simpler
Windows CE environment. However, there may be a market for Windows
CE versions of conventional x86 subnotebooks and pen computers.
Within the next year or two, we may see Windows CE appear as an
option on these products.
The PowerPC option probably presages the development of PowerPC-based
Windows CE devices. Without specific interest, Microsoft is unlikely
to go to the trouble of porting the OS. Microsoft is not supporting
the high-end PowerPC processors used in Apple?s Macintosh computers,
however. Instead, it is working with Motorola?s embedded PowerPC
parts. Currently, Windows CE is running on the PowerPC MPC 821
and MPC 823, and the MPC 801 is not far behind. Motorola has a
strong history of providing integrated peripherals with its 68000
and PowerPC embedded processors, and already supports many different
operating systems on its various CPUs. Access to the Windows CE
market is likely to help expand Motorola?s market even further.
It is also likely that we will soon see Windows CE products using
Advanced RISC Machines? ARM processor architecture. The best of
these devices, Digital?s SA-110 StrongARM processor, is also the
heart of Apple?s new Newton MessagePad 2000. At 161.9 MHz and
a price below $34 for the version Apple uses, it offers dramatically
better price/performance than any other Windows CE processor,
and this will help to open up new markets for high-performance
mobile computing devices. The ARM architecture is licensed to
a total of 16 microprocessor vendors, and at least 11 operating
systems run on the ARM platform.
The first seven Windows CE products are just the tip of the iceberg?expect
to see many more announcements over the next year, based on a
wide array of processors. With Microsoft supporting five completely
separate processor families, Windows CE can bring the power of
personal computing to a wide range of consumer-electronics products.
-Peter Glaskokski
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